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| 74ACT158 Quad 2-Input Multiplexer November 1988 Revised April 2005 74ACT158 Quad 2-Input Multiplexer General Description The ACT158 is a high-speed quad 2-input multiplexer. It selects four bits of data from two sources using the common Select and Enable inputs. The four buffered outputs present the selected data in the inverted form. The ACT158 can also be used as a function generator. Features s ICC reduced by 50% s Outputs source/sink 24 mA s TTL-compatible inputs Ordering Code: Order Number 74ACT158SC 74ACT158SJ 74ACT158MTC 74ACT158PC Package Number M16A M16D MTC16 N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Pb-Free 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Device also available in Tape and Reel. Specify by appending suffix letter "X" to the ordering code. Pb-Free package per JEDEC J-STD-020B. Logic Symbols Connection Diagram IEE/IEC Pin Descriptions Pin Names I0a-I0d I1a-I1d E S Za-Zd Description Source 0 Data Inputs Source 1 Data Inputs Enable Input Select Input Inverted Outputs FACT is a trademark of Fairchild Semiconductor Corporation. (c) 2005 Fairchild Semiconductor Corporation DS009930 www.fairchildsemi.com 74ACT158 Functional Description The ACT158 quad 2-input multiplexer selects four bits of data from two sources under the control of a common Select input (S) and presents the data in inverted form at the four outputs. The Enable input (E) is active-LOW. When E is HIGH, all of the outputs (Z) are forced HIGH regardless of all other inputs. The ACT158 is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. A common use of the ACT158 is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The ACT158 can generate four functions of two variables with one variable common. This is useful for implementing gating functions. Truth Table Inputs E H L L L L S X L L H H I0 X L H X X I1 X X X L H Outputs Z H H L H L H HIGH Voltage Level L LOW Voltage Level X Immaterial Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 74ACT158 Absolute Maximum Ratings(Note 1) Supply Voltage (VCC) DC Input Diode Current (IIK) VI VI 0.5V to 7.0V 20 mA 20 mA 0.5V to VCC 0.5V 20 mA 20 mA 0.5V to VCC 0.5V r50 mA r50 mA 65qC to 150qC 140qC Recommended Operating Conditions Supply Voltage (VCC) Input Voltage (VI) Output Voltage (VO) Operating Temperature (TA) Minimum Input Edge Rate ('V/'t) VIN from 0.8V to 2.0V VCC @ 4.5V, 5.5V 125 mV/ns 4.5V to 5.5V 0V to VCC 0V to VCC 0.5V VCC 0.5V DC Input Voltage (VI) DC Output Diode Current (IOK) VO VO 40qC to 85qC 0.5V VCC 0.5V DC Output Voltage (VO) DC Output Source or Sink Current (IO) DC VCC or Ground Current per Output Pin (ICC or IGND) Storage Temperature (TSTG) Junction Temperature (TJ) Note 1: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variable. Fairchild does not recommend operation of FACT circuits outside databook specifications. DC Electrical Characteristics Symbol VIH VIL VOH Parameter Minimum HIGH Level Input Voltage Maximum LOW Level Input Voltage Minimum HIGH Level Output Voltage VCC (V) 4.5 5.5 4.5 5.5 4.5 5.5 4.5 5.5 VOL Maximum LOW Level Output Voltage 4.5 5.5 4.5 5.5 IIN ICCT IOLD IOHD ICC Maximum Input Leakage Current Maximum ICC/Input Minimum Dynamic Output Current (Note 3) Maximum Quiescent Supply Current 5.5 5.5 5.5 5.5 5.5 4.0 0.6 0.001 0.001 TA Typ 1.5 1.5 1.5 1.5 4.49 5.49 2.0 2.0 0.8 0.8 4.4 5.4 3.86 4.86 0.1 0.1 0.36 0.36 25qC TA 40qC to 85qC 2.0 2.0 0.8 0.8 4.4 5.4 3.76 4.76 0.1 0.1 0.44 0.44 Guaranteed Limits Units V V V VOUT VOUT IOUT VIN V IOH IOH V IOUT VIN V IOL IOL VI VI Conditions 0.1V 0.1V or VCC 0.1V or VCC 0.1V 50 PA VIL or VIH 24 mA 24 mA (Note 2) 50 PA VIL or VIH 24 mA 24 mA (Note 2) VCC, GND VCC 2.1V 1.65V Max 3.85V Min VCC r0.1 r1.0 1.5 75 PA mA mA mA VOLD VOHD VIN or GND 75 40.0 PA Note 2: All outputs loaded; thresholds on input associated with output under test. Note 3: Maximum test duration 2.0 ms, one output loaded at a time. 3 www.fairchildsemi.com 74ACT158 AC Electrical Characteristics VCC Symbol Parameter (V) (Note 4) tPLH tPHL tPLH tPHL tPLH tPHL Propagation Delay S to Zn Propagation Delay S to Zn Propagation Delay E to Zn Propagation Delay E to Zn Propagation Delay In to Zn Propagation Delay In to Zn Note 4: Voltage Range 5.0 is 5.0V r 0.5V TA CL Min 2.5 1.5 1.5 1.5 1.5 1.5 25qC 50 pF Typ 6.0 5.5 5.5 5.5 4.5 4.0 Max 9.5 9.0 9.5 9.5 8.0 6.5 TA 40qC to 85qC CL 50 pF Max 11.0 10.0 10.5 10.5 8.5 7.5 ns ns ns ns ns ns Units Min 2.0 1.5 1.5 1.5 1.0 1.0 5.0 5.0 5.0 5.0 5.0 5.0 Capacitance Symbol CIN CPD Parameter Input Capacitance Power Dissipation Capacitance Typ 4.5 45.0 Units pF pF VCC VCC OPEN 5.0V Conditions www.fairchildsemi.com 4 74ACT158 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow Package Number M16A 5 www.fairchildsemi.com 74ACT158 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) Pb-Free 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D www.fairchildsemi.com 6 74ACT158 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 7 www.fairchildsemi.com 74ACT158 Quad 2-Input Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com 8 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com |
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